SMTS is a framework for organising and visualizing executions of SMT and PDR in distributed computing environments. The design is based on a general parallelization technique that supports recursively combining algorithm portfolios and divide-and-conquer with the exchange of learned information. In addition it allows the user to visually inspect both the parallel execution and the instance structure, and supports interactive, high-level guidance of the algorithm through a web interface.
A virtual image with compiled binaries is available at http://188.8.131.52:8081
A PDF accompanying the virtual image and describing SMTS architecture is available at http://verify.inf.usi.ch/sites/default/files/smts_artifact.pdf