Formal Verification at University of Lugano

Our Lab is a part of Informatics Faculty at University of Lugano. The Lab was established in 2006 when Prof. Sharygina moved from Carnegie Mellon University to University of Lugano after receiving a career award from the Tasso Foundation. The Lab projects focus on automated formal verification with a particular interest in software/hardware model checking, information security, static analysis, abstract interpretation and decision procedures. We create both theoretical frameworks and practical tools to enable sound and scalable verification of industrial-size systems.

For questions about the Lab projects and open positions, contact natasha.sharygina@usi.ch.

We also lead student semestral projects, take a look at the list of topics that we offer.

We have a NEW open PhD position. For more informations, click here.

 

Latest news

2008-12-10

Aliaksei Tsitovich presented his Ph.D. research proposal on "Detection of Security Vulnerabilities by Guided Model Checking" at the ICLP'08 Doctoral Consortium
2008-10-12

"The Synergy of Precise and Fast Abstractions for Program Verification" paper was accepted to 24th Annual ACM Symposium on Applied Computing.
2008-09-08

Our security project has been funded by SNSF for 2 more years.
2008-08-27

Results of our work on secure mobile code will be presented at the TOOLS Session of the VSTTE 2008
2008-07-15

OpenSMT 0.1 was released to public at SMT2008 competition at CAV 2008
2008-07-04

The "Loop Summarization using Abstract Transformers" paper was accepted for ATVA2008.
2008-06-30

We organized "USI-CMU Summer School on Dependable Computer Systems".
2008-05-27

Edgar left for a 3 month internship at Microsoft research.

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