Formal Verification and Security Lab

Our Lab is a part of the Informatics Faculty at the University of LuganoThe Lab was established in 2006 when Prof. Sharygina received a career award from the Tasso Foundation. The Lab projects focus on automated formal verification with a particular interest in software/hardware model checking, information security, static analysis, abstract interpretation, and decision procedures. We create both theoretical frameworks and practical tools to enable sound and scalable verification of industrial-size systems.

For questions about the Lab projects contact

We have NEW open PhD and Postdoc positions. For more information, contact